1. MFC (Magnetic Film Cell) in MRAM
As a memory cell in MRAM, the magnetic film contains at least such a film structure as [F1/NF/F2], in which F1 and F2 represent two magnetic material layers and NF represents a nonmagnetic material layer interposed between the F1 layer and F2 layer. There is one and only one layer of the F1 and F2, the magnetization direction of which is fixed by a certain layer or layers of external materials (referred to as a nailed layer), thus can not vary as desired under the effect of a small external magnetic field; whereas the other layer is a soft magnetic layer, the magnetization direction of which can vary under the effect of a small external magnetic field (referred to as a free layer). The thickness of the nonmagnetic material layer is very thin which is typically between 0.5 nm and 3.0 nm. Taking such a magnetic film as a memory cell, when the magnetization directions of F1 and F2 are identical, the magnetic film cell MFC shows a low resistance state, and when the magnetization directions of F1 and F2 are opposite, the magnetic film cell MFC shows a high resistance state.
Therefore, the magnetic film cell MFC has two stable resistance states. By changing the magnetization direction of the free layer with respect to the nailed layer in the magnetic film cell MFC, the magnetic film cell MFC can be made to record information. By detecting the resistance state of the magnetic film cell MFC, the information stored therein can be obtained.
2. Typical MRAM Unit Structure
The structure of a commonly used magnetic film cell MFC is shown in FIG. 1. The MRAM structure is configured on a semiconductor substrate and needs totally 3 metal wiring layers M1, M2, M3 and a transitional metal layer TM. Except a read word line RWL, its ground line GND, write word line WWL and bit line BL are located in different metal wiring layers, respectively. The magnetic film cell MFC is connected to the drain region of a transistor ATR through the transitional metal layer TM, the metal wiring layers M2 and M1 as well as pertinent contact holes. The source region of the transistor ATR is connected with the ground line GND, and the gate of the transistor ATR is also the read word line RWL simultaneously.
The writing of information in the magnetic film cell MFC is completed by the cooperation of the bit line BL and the write word line WWL. When writing operation current pass through the bit line BL and the write word line WWL in a certain sequential relation, the corporate magnetic field of the magnetic fields generated by the both currents will make the magnetization direction of the free layer in the magnetic film cell MFC reverse to a certain direction, and the magnetization direction can be stabled on one desired state of its two stable states after canceling the currents of the bit line BL and the write word line WWL. Thus, the writing and storing of information in the magnetic film cell MFC is implemented.
The reading of the information in the magnetic film cell MFC is controlled by the read word line RWL. When the reading is enabled, the read word line RWL is controlled onto an appropriate level to make the transistor ATR to turn on. At this time, there exists an electronic closed circuit from the bit BL (metal wiring layer M3) to the ground line GND through the magnetic film cell MFC, the transitional metal layer TM, a contact hole, the metal wiring layer M2, a contact hole, the metal wiring layer M1, a contact hole, the drain region of the transistor ATR and the source region of the transistor ATR. Therefore, when an appropriate current is provided by the bit line BL, the current resistance state of the magnetic film cell MFC can be extracted. Thus, the reading of information in the magnetic film cell MFC is implemented.
As mentioned above, the MRAM with this kind of structure needs up to 3 metal wiring layers and a transitional metal layer to form its electronic connection, which makes the manufacturing process of the MRAM complicated and its cost high. In addition, before manufacturing the magnetic film cell MFC, the processing operations such as deposition, wiring, punching, insulating medium filling and covering up, and etc. have been experienced on the substrate many times, which makes the smoothness of the surface of the manufacturing face of the magnetic film cell MFC relatively poor, so a special surface polishing processing (such as CMP, Chemical-Mechanical Polishing) should be conducted so as to meet special requirement of the magnetic film cell for the smoothness of the substrate surface. This is also an issue increasing processing difficulty and manufacturing cost.